The present invention relates to solid state capacitors, and more particularly, to a multi-segment tunable capacitor.
Discrete capacitors and solid state capacitors, such as variable capacitive diodes and varactor diodes are well known in the prior art. Metal-insulator-semiconductor (MIS) such as MNOS capacitors are also well known.
A MIS capacitor comprises successive layers of a metal, insulator and silicon. In an MOS structure, the insulator is an oxide layer. In a MNOS structure, the insulator layer includes a nitride layer as well as an oxide layer. This gives the MNOS structure a memory capability which is well known in the art, while the MOS structure exhibits its set value of capacitance only when the bias signal is applied to the gate electrode portion of the MOS structure.
The MIS prior art capacitor exhibits a first capacitive value when the bias signal applied to its gate electrode exceeds its threshold voltage, and the MIS prior art capacitor exhibits a second capacitive value when the bias signal applied to its gate electrode is less than its threshold value. By varying the level of the bias signal, the MIS capacitor is caused to exhibit different values of capacitance.
This mode of operation is to be contrasted to the preferred embodiment described herein which is an MNOS capacitor. In the preferred embodiment, the MNOS capacitor is given a first or second capacitive value by the application of a write or erase signal. However, when the write or erase signal is removed, the MNOS capacitor structure retains that capacitance value set by the write or erase signal, as is well known in the art. This capability to retain the set capacitive value is also referred to as a memory capability.
In the typical operation of MNOS capacitors with P-type silicon as the substrate, the application of a positive, erase signal to the capacitor terminal creates a negative charge at the oxide-nitride interface for generating a first relatively low value of capacitance. The application of a negative, write signal to the capacitor creates a positive charge at the same oxide-nitride interface for generating a second relatively high value of capacitance. This change in capacitance value of a MNOS capacitor follows the very familiar hysteresis type curve associated with magnetic substances. Accordingly, the capacitance value of the MNOS capacitor changes from a first relatively low stable value to a second relatively high stable value along the familiar hysteresis pathways dependent upon the application to the capacitor of a negative or a positive signal, respectively.
The capacitance exhibited by the MNOS structure is also alterable by its process of manufacture. More specifically, the capacitance value of the MNOS structure is determined in part by the thickness of the oxide layer, and/or the thickness of the nitride layer, and/or the thickness of the field oxide layer, and/or the surface charge on the semiconductor body in which the MNOS capacitor is built.